# MIPS/IRIX  ISA/ABI
# Used to configure dwarfdump printing of .debug_frame and
# .eh_frame.

# To always format DWARF expressions blocks as all operations on
# one line (a limited version of -d (--format-dense))
# without needing to use the dwarfdump option
# --format-expr-ops-joined explicitly, 
# remove the # from the following line.
#option: --format-expr-ops-joined

# Any number of abi's can be described. Only one can be selected
# in a given dwarfdump run (see dwarfdump options)
#  Available commands are
# beginabi:  <abiname>
# reg: <regname> <dwarf regnumber>
# frame_interface: <integer value 2 or 3>
# cfa_reg:  <number>
# initial_reg_value:  <number: often 1034 or 1035 >
# same_val_reg: 1035   
# undefined_val_reg: 1034  
# reg_table_size: <size of table>
# address_size: <4 or 8, Rarely needed, see example below. >
# includeabi: <abiname  Inserts the referenced abi as if its text was
#            directly inserted at this point.>
# endabi:  <abiname>
#
# Symbolic names do not work here, use literal numbers
# where applicable (in C standard decimal, octal (leading 0) or
# hexadecimal <leading 0x>).
#
# Whitespace is required to separate command: from operands and
# operands from each other on a line.
#
# There is no ordering required within a beginabi/endabi pair.
# As many ABIs as required may be listed.
# dwarfdump will choose exactly one abi to dump frame information.
#


# Make 'mips' abi be a modern MIPS, not an old IRIX version.
beginabi: mips
includeabi: mips-simple3
endabi: mips

# MIPS/IRIX  ISA/ABI for testing  the current frame interface
# with libdwarf.
beginabi: mips-simple3
frame_interface: 3

# When using frame_interface: 3 the size of the register table
# is not fixed. It can be as large as needed. 
reg_table_size: 66
cfa_reg: 1436  # DW_FRAME_CFA_COL3
initial_reg_value:  1035
same_val_reg: 1035
undefined_val_reg: 1034

# No cfa as a 'normal' register. 
# Rule 0 is just register 0, which is not used
# in frame descriptions.
# (so cfa does not have a number here, and dwarfdump gives
# it the name 'cfa' automatically).
reg: ra  64
reg: slk 65
# End of abi definition.
endabi: mips-simple3


beginabi: ia64
frame_interface: 3
initial_reg_value: 1034  # DW_FRAME_UNDEFINED_VAL
cfa_reg: 1436  # DW_FRAME_CFA_COL3
reg_table_size: 695
same_val_reg: 1035
undefined_val_reg: 1034

# The following register names are not necessarily correct...
# Register indexes r32-r127 not used.
reg: f0 128
# ...
reg: f127 255
reg: b0 321
reg: b1 322
reg: b2 323
reg: b3 324
reg: b4 325
reg: b5 326
reg: b6 327
reg: b7 328
reg: vfp 329
reg: vrap 330
reg: pr 331
reg: ip 332
reg: psr 333
reg: cfm 334
reg: k0 335
reg: k1 336
reg: k2 337
reg: k3 338
reg: k4 339
reg: k5 340
reg: k6 341
reg: k7 342
reg: rsc  350 
reg: bsp 351 
reg: bspstore 352 
reg: rnat 353
reg: fcr 355
reg: eflag 358
reg: csd 359
reg: ssd 360 
reg: cflg 361
reg:  fsr 362
reg: fir 363
reg:  fdr 364
reg: pfs 398 
reg: lc 399
reg: ec 400

endabi: ia64


beginabi: x86
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
reg_table_size: 66  # more than large enough, hopefully.
cfa_reg: 1436  # DW_FRAME_CFA_COL3
same_val_reg: 1035
undefined_val_reg: 1034

# The following register names are not necessarily correct...
reg: eax 0
reg: ecx 1    
reg: edx 2
reg: ebx 3
reg: esp 4
reg: ebp 5
reg: esi 6
reg: edi 7
reg: eip 8
reg: eflags 9

reg: trapno 10
reg: st0 11
reg: st1 12
reg: st2 13
reg: st3 14
reg: st4 15
reg: st5 16
reg: st6 17
reg: st7 18
# 19 is ? 20 is ?
reg: xmm0  21
reg: xmm1  22 
reg: xmm2  23
reg: xmm3  24
reg: xmm4  25
reg: xmm5  26
reg: xmm6  27
reg: xmm7  28

reg: mm0  29
reg: mm1  30
reg: mm2  31
reg: mm3  32
reg: mm4  33
reg: mm5  34
reg: mm6  35
reg: mm7  36

reg: fcw  37
reg: fsw  38
reg: mxcsr 39

reg: es 40
reg: cs 41
reg: ss 42
reg: ds 43
reg: fs 44
reg: gs 45
# 46 47 are ?
reg: tr 48
reg: ldtr 49


endabi: x86


beginabi: x86_64
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
reg_table_size: 66  # more than large enough, hopefully.
cfa_reg: 1436  # DW_FRAME_CFA_COL3
same_val_reg: 1035
undefined_val_reg: 1034

# The following register names are not necessarily correct...
reg: rax 0
reg: rdx 1    
reg: rcx 2
reg: rbx 3
reg: rsi 4
reg: rdi 5
reg: rbp 6
reg: rsp 7
reg: r8 8
reg: r9 9
reg: r10 10
reg: r11 11
reg: r12 12
reg: r13 13
reg: r14 14
reg: r15 15
reg: rip 16
reg: xmm0 17
reg: xmm1 18
reg: xmm2 19
reg: xmm3 20
reg: xmm4 21
reg: xmm5 22
reg: xmm6 23
reg: xmm7 24
reg: xmm8 25
reg: xmm9 26
reg: xmm10 27
reg: xmm11 28
reg: xmm12 29
reg: xmm13 30
reg: xmm14 31
reg: xmm15 32

reg: st0 33
reg: st1 34
reg: st2 35
reg: st3 36
reg: st4 37
reg: st5 38
reg: st6 39
reg: st7 40

reg: mm0 41
reg: mm1 42
reg: mm2 43
reg: mm3 44
reg: mm4 45
reg: mm5 46
reg: mm6 47
reg: mm7 48

reg: rflags 49
reg: es 50
reg: cs 51
reg: ss 52
reg: ds 53
reg: fs 54
reg: gs 55
# 56, 57 are ?
reg: fs.base 58
reg: gs.base 59
# 60 61 are ?
reg: tr 62
reg: ldtr 63

endabi: x86_64

beginabi: m68k
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
reg_table_size: 66  # more than large enough, hopefully.
cfa_reg: 1436  # DW_FRAME_CFA_COL3
same_val_reg: 1035
undefined_val_reg: 1034

reg: d0 0
reg: d1 1
reg: d2 2
reg: d3 3
reg: d4 4
reg: d5 5
reg: d6 6
reg: d7 7

reg: a0 8
reg: a1 9
reg: a2 10
reg: a3 11
reg: a4 12
reg: a5 13
reg: a6 14
reg: sp 15

reg: fp0 16
reg: fp1 17
reg: fp2 18
reg: fp3 19
reg: fp4 20
reg: fp5 21
reg: fp6 22
reg: pc 23

endabi: m68k

# Demonstrates  use of address_size and includeabi keywords.
# address_size is useful when an Elf64 object has DWARF2
# 32bit (4 byte) address-size frame data (which has no address_size field)
# and no .debug_info section to provide the 32bit address size.
beginabi: ppc32bitaddress
address_size: 4
includeabi: ppc
endabi: ppc32bitaddress

beginabi: ppc
# This abi defined Oct 2008 based on:
# http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
frame_interface: 3
# abi dwarf table uses up thru 1155.
# As of Oct 2008, the only ABI requiring a higher
# DW_FRAME_SAME_VAL and DW_FRAME_CFA_COL3.
initial_reg_value: 1235  # DW_FRAME_SAME_VAL
cfa_reg: 1436  # DW_FRAME_CFA_COL3
same_val_reg: 1235   
undefined_val_reg: 1234  
reg_table_size: 1200

reg: r0 0
reg: f0 32
reg: f1 33
reg: f2 34
reg: f3 35
reg: f4 36
reg: f5 37
reg: f6 38
reg: f7 39
reg: f8 40
reg: f9 41
reg: f10 42
reg: f11 43
reg: f12 44
reg: f13 45
reg: f14 46
reg: f16 47
reg: f17 48
reg: f18 49
reg: f19 50
reg: f20 51
reg: f21 52
reg: f22 53
reg: f23 54
reg: f24 55
reg: f25 56
reg: f26 57
reg: f27 58
reg: f28 59
reg: f29 60
reg: f30 62
reg: f31 63
reg: cr  64
reg: fpcsr 65
# spr0 is also called MQ
reg: spr0 100
# spr1 is also called XER
reg: spr1 101
# spr4 also called rtcu
reg: spr4 104
# spr5 also called rtcl
reg: spr5 105
#spr8 also called LR
reg: spr8 108
# spr9 also called ctr
reg: spr9 109
reg: msr 66
reg: sr0 70
reg: sr1 71
reg: sr2 72
reg: sr3 73
reg: sr4 74
reg: sr5 75
reg: sr6 76
reg: sr7 77
reg: sr8 78
reg: sr9 79

#dsisr also called spr18
reg: spr18 118
# dar also called spr19
reg: spr19 119
#dec also called spr22
reg: spr22  122
#sdr1 also called spr25
reg: spr25  125
#srr0 also called spr26
reg: spr26  126
#srr1 also called spr27
reg: spr27  127

#vrsave also called spr256
reg: spr256  356
#sprg0 also called spr272
reg: spr272  372
#sprg1 also called spr273
reg: spr273  373
#sprg2 also called spr274
reg: spr274  374
#sprg3 also called spr275
reg: spr275  375
#asr also called spr280
reg: spr280  380
#ear also called spr282
reg: spr282  382
#tb also called spr284
reg: spr284  384
#tbu also called spr285
reg: spr285  385
#pvr also called spr287
reg: spr287  387
#ibat0u also called spr528
reg: spr528  628
#ibat0l also called spr529
reg: spr529  629
#ibat1u also called spr530
reg: spr530  630
#ibat1l also called spr531
reg: spr531  631
#ibat2u also called spr532
reg: spr532  632
#ibat2l also called spr533
reg: spr533  633
#ibat3u also called spr534
reg: spr534  634
#ibat3l also called spr535
reg: spr535  635
#dbat0u also called spr536
reg: spr536  636
#dbat0l also called spr537
reg: spr537  637
#dbat1u also called spr538
reg: spr538  638
#dbat1l also called spr539
reg: spr539  639
#dbat2u also called spr540
reg: spr540  640
#dbat2l also called spr541
reg: spr541  641
#dbat3u also called spr542
reg: spr542  642
#dbat3l also called spr543
reg: spr543  643

#hid0 also called spr1008
reg: spr1008  1108
#hid1 also called spr1009
reg: spr1009  1109
#hid2 also called iabr or spr1010
reg: spr1010  1110
#hid5 also called  dabr or spr1013
reg: spr1013  1113
#hid15 also called  pir or spr1023
reg: spr1023  1123

# vector registers 0-31
reg: vr0  1124
reg: vr1  1125
reg: vr2  1126
reg: vr3  1127
reg: vr4  1128
reg: vr5  1129
reg: vr6  1130
reg: vr7  1131
reg: vr8  1132
reg: vr9  1133
reg: vr10  1134
reg: vr11  1135
reg: vr12  1136
reg: vr13  1137
reg: vr14  1138
reg: vr15  1130
reg: vr16  1140
reg: vr17  1141
reg: vr18  1142
reg: vr19  1143
reg: vr20  1144
reg: vr21  1145
reg: vr22  1146
reg: vr23  1147
reg: vr24  1148
reg: vr25  1149
reg: vr26  1150
reg: vr27  1151
reg: vr28  1152
reg: vr29  1153
reg: vr30  1154
reg: vr31  1155
endabi:  ppc

# 'Generic 1000 register abi'.
# This is useful as a 'general' ABI settings for
# cpus using up to 1000 registers. The register names
# show as a number, like  'r991'.
beginabi: generic
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
cfa_reg: 1436  # DW_FRAME_CFA_COL3
reg_table_size: 1000
same_val_reg: 1035
undefined_val_reg: 1034
reg: r0 0
endabi: generic

# 'Generic 500 register abi'.
# This is useful as a 'general' ABI settings for
# cpus using up to 500 registers. The register names
# show as a number, like  'r91'.
beginabi: generic500
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
cfa_reg: 1436  # DW_FRAME_CFA_COL3
reg_table_size: 500
same_val_reg: 1035
undefined_val_reg: 1034
reg: r0 0
endabi: generic500

# 'Generic 100 register abi'.
# This is useful as a 'general' ABI settings for
# cpus using up to 100 registers. The register names
# show as a number, like  'r91'.
beginabi: generic100
frame_interface: 3
initial_reg_value: 1035  # DW_FRAME_SAME_VAL
cfa_reg: 1436  # DW_FRAME_CFA_COL3
reg_table_size: 100
same_val_reg: 1035
undefined_val_reg: 1034
reg: r0 0
endabi: generic100


beginabi: arm
frame_interface: 3
# When using frame_interface: 3 the size of the register
# table is not fixed.  It can be as large as needed.
reg_table_size: 288
cfa_reg: 1436  # DW_FRAME_CFA_COL3
initial_reg_value:  1034
same_val_reg: 1035
undefined_val_reg: 1034
# If the vendor co-processor registers are allowed 
# or other numbers above 287 used then
# the reg_table_size must be increased and (possibly)
# the cfa, same_value, undefined_value reg values changed
# here.
# r0-r15 are 0 through 15.
# Numbers 16 through 63 had meaning
# in some ARM DWARF register mappings.
reg: s0 64
reg: s1 65
reg: s2 66
reg: s3 67
reg: s4 68
reg: s5 69
reg: s6 70
reg: s7 71
reg: s8 72
reg: s9 73
reg: s10 74
reg: s11 75
reg: s12 76
reg: s13 77
reg: s14 78
reg: s15 79
reg: s16 80
reg: s17 81
reg: s18 82
reg: s19 83
reg: s20 84
reg: s21 85
reg: s22 86
reg: s23 87
reg: s24 88
reg: s25 89
reg: s26 90
reg: s27 91
reg: s28 92
reg: s29 93
reg: s30 94
reg: s31 95
reg: f0 96
reg: f1 97
reg: f2 98
reg: f3 99
reg: f4 100
reg: f5 101
reg: f6 102
reg: f7 103
reg: wcgr0 104
reg: wcgr0 105
reg: wcgr0 106
reg: wcgr0 107
reg: wcgr0 108
reg: wcgr0 109
reg: wcgr0 110
reg: wcgr0 111
reg: wr0   112
reg: wr1   113
reg: wr2   114
reg: wr3   115
reg: wr4   116
reg: wr5   117
reg: wr6   118
reg: wr7   119
reg: wr8   120
reg: wr9   121
reg: wr10   122
reg: wr11   123
reg: wr12   124
reg: wr13   125
reg: wr14   126
reg: wr15   127
reg: spsr   128
reg: spsr_fiq   129
reg: spsr_irq   130
reg: spsr_abt   131
reg: spsr_und   132
reg: spsr_svc   133
reg: r8_usr     144
reg: r9_usr     145
reg: r10_usr     146
reg: r11_usr     147
reg: r12_usr     148
reg: r13_usr     149
reg: r14_usr     150
reg: r8_fiq     151
reg: r9_fiq     152
reg: r10_fiq     153
reg: r11_fiq     154
reg: r12_fiq     155
reg: r13_fiq     156
reg: r14_fiq     157
reg: r13_riq     158
reg: r14_riq     159
reg: r14_abt     160
reg: r13_abt     161
reg: r14_und     162
reg: r13_und     163
reg: r14_svc     164
reg: r13_svc     165
reg: wc0     192
reg: wc1     193
reg: wc2     192
reg: wc3     192
reg: wc4     192
reg: wc5     197
reg: wc6     198
reg: wc7     199
reg: d0     256
reg: d1     257
reg: d2     258
reg: d3     259
reg: d4     260
reg: d5     261
reg: d6     262
reg: d7     263
reg: d8     264
reg: d9     265
reg: d10     266
reg: d11     267
reg: d12     268
reg: d13     269
reg: d14     270
reg: d15     271
reg: d16     272
reg: d17     273
reg: d18     274
reg: d19     275
reg: d20     266
reg: d21     277
reg: d22     278
reg: d23     279
reg: d24     280
reg: d25     281
reg: d26     282
reg: d27     283
reg: d28     284
reg: d29     285
reg: d30     286
reg: d31     287
# End of abi definition.
endabi: arm

