=====================================================================
                         ARM-MvZbTˑ݌v
                                  Last Modified: 23 Aug 2008 21:54:54
=====================================================================

̃hLg̈ʒuÂ

̃hLǵCTOPPERS/ASPJ[lARMvX-MvZbTɈڐA邽
̐݌vłD


ARMVx-M̎dl܂Ƃ

ARMvX-M̎dl̂CJ[l̐݌vɊ֌W鎖ɂĂ܂Ƃ߂D

WX^

ėpWX^R0`R1516ނCR13݂̂2oN\iPSP,MSPjƂ
ĂDR15PC, R14̓NWX^iLRjƂȂĂDR0`R3,R12
XNb`WX^łD

R[ORxV

R0`R4Cȏ̓X^bND߂ĺCR0`R1Ɋi[D(ARM
K肳Ă邽߁CRpCɈˑ̃[ƂȂD)

CONTROLWX^

PSP,MSP̐؂ւCPrivilageUser[h̃WX^DύX́CCXg
NVobt@tbV߂sKviisbjDCONTROL
WX^̏ڍׂ́CARMv7-M Architecture Application Level Reference 
Manual  B1-9 QƂ̂ƁD

݃xN^

xN^e[u^ŁCxN^e[ũAhX́CZbg0x00ŁC
Vector Table Offset Registeri}bvhWX^j 𑀍삷邱
ŁCCӂ̃AhXɔzu\łD

Dx

lDxƂȂD

Dx͍ő8bitłCSoCɎĂrbgقȂD
rbg8bitȉ̏ꍇ́CLSB疳ɂȂDႦ΁CĂ
rbg7bit̏ꍇ́Crbg0ƂȂD

Dx̃rbgtB[hLSB琔rbgTuDxƌĂԃtB[h
ɐݒ肷邱Ƃ\łDc̏ʃrbgvGvVDx
ĂԁDvGvVDxŁCTuDxقȂDx̃O[
v́C݂vGvg邱ƂłȂD

Reset,NMI,Hard Fault ȊO̗O݂͊ƓlɗDxݒ\łC
݃}XN@\ɂC֎~邱Ƃ\łD

CPU[h

vZbT́CThread[hHandler[ĥꂩ̃[hƂ
D

Zbg̏

ZbgThread[hCMSPLƂȂĂD

Handler[h

O/݂󂯕tƑJڂ郂[hD󂯕tO/݂̗O
CIPSRɃZbgDOԍ́CTRMŒ߂ĂԍłD

        O              Oԍ
  Reset                      1
  Non-makable Interrupt      2
  Hard Fault                 3
  Memory Management          4
  Bus Fault                  5
  Usage Fault                6
  SVCall                    11
  Debug Monitor             12
  PendSV                    14
  SysTick                   15
  IRQ0                      16
  IRQ1                      17
  ..

O/݂󂯕tƁC󂯕tO/݂̗Dxȉ̗O/
݂֎~D̗Dx}XN"NVICDx}XN"ƌĂԁD̗Dx
́C\tgEFAύX邱ƂłCO/݂̃^[ɂ
ݑO̒lɎIɖ߂D

X^bN|C^iPSPMSPj

X^bN|C^́CPSPMSPCrIɎgp\łDHandler
[hłMSP̂ݎgp\łCThread[hłCONTROLWX^őI
\łDCONTROLWX^1rbgڂZbgPSPLɁCNA
ƁCMSPLɂȂD

Thread[hHandler[h̑J

Thread[hHandler[hւ̑Jڂ́CO/݂󂯕t邱Ƃ
DCHandler[hThread[hւ̑Jڂ́CPC
EXC_RETURN(0xfffffffx)̒lݒ肷邱ƂɂsiO^[
ĂԁjDEXC_RETURN̉4bitɂCJڐ̃[hgpX^bN|
C^ύX\łDO^[ɂCPRIMASKBASEPRI̒l͕ω
ȂDCFAULTMASK̒l'0'ɃNAD

EXC_RETURN

O/ݎtlrɐݒ肳lDrbg31`4rbg͑S'1'ŁC
4bit́CtCPU[hX^bN𔽉flƂȂĂD

 0b0001 : Handler[h
 0b1001 : Thread[h with MSP
 0b1101 : Thread[h with PSP

Thread[hHandler[h̔

̃[h𔻒肷ɂ́CIPSRāC'0'ȂThread[hCȊO
ȂCHandler[hƂȂD

BASEPRIWX^

ݒ肵Dxȉ̗Dx݂̊̎t֎~D̗Dx}XN
"BASEPRIDx}XN"ƌĂԁD'0'ݒ肷ƁCSĂ݂̊D
O/݂̎tƃ^[ɂωȂDO/݂ɑ΂銄
Dx}XŃCNVICDx}XNBASEPRI̐ݒl̍il
jƂȂD

FAULTMASK

FAULTMASK'1'Zbg邱ƂɂCNMIȊȎSĂ݂̊֎~D
FAULTMASḰCÕ^[ɂ'0'ɃNAD

PRIMASKWFI

PRIMASK'1'ɐݒ肷ƁCNMI  Hardware Fault ȊO̗O/݂
~DPRIMASK݂͊̋Ɗݑ҂Ag~bNɍs߂ɗp
D̓Iɂ́CPRIMASKZbgĂԂwfisƁC荞
ݑ҂ƂȂCݎtƃnhsɁCwfi烊^[
ĂD

O/݂̎t

EO/݂tƁCtɃANeBuȃX^bNɈȉ̃R
  eLXgۑ(Ot[ƌĂ)D

   -----------
  |    R0     |  <- new SP
   -----------
  |    R1     |
   -----------
  |    R2     |
   -----------
  |    R3     |
   -----------
  |    R12    |
   -----------
  |    LR     |
   -----------
  |    PC     |
   -----------
  |   xPSR    |
   -----------
  |           | <- old SP

EvZbTHandler[hƂDMSPLƂȂD
EtO/݂̗OԍIPSRɐݒ肷D
ENVICݗDx}XNtO/݂̗Dxɐݒ肷D
ElrEXC_RETURN̒lݒ肳D
ExN^e[uǂݍ݃nhsD

O/݂̃^[

pcEXC_RETURN̒lݒ肷邱ƂɂCO/݂烊^[D
pcւ̐ݒɎgp\Ȗ߂ɂ͐Cȉ߂gp\łD

  EPOP/LDM, LDR, BX

ۑ

ExN^[e[uɓo^֐̃AhXLSB'1'ɂׂ?
ENVIC͗OẼ݂lXg񐔂IɊǗĂ炵D
  (!t@X𖾂炩)D
    \tgEFAł́ClXg̒K킹΁C^[X^bNU
    ĂȂD


OS̎

1.^[Qbg

 1-1 cm3(Cortex-M3)
 1-2 armv7m(ARMV7M)
 1-3 arm_m

cm3ł́CCoretex-M1(armv6-m)T|[gꍇɖƂȂDarmv7mł́C
armv8m[XꂽꍇɖƂȂDARMˑJSPł́Carmv4Ƃ
ĂCarmv5armv7삷邽ASPł͒ParmƂD̂߁C
arm_mƍlD


2.Thread[hHandler[h̎g

 2-1
  ^XNReLXgThread[hC^XNReLXgHandler[
  hœ삳D

 2-2
  ^XNReLXgƔ^XNReLXgHandler[hœ삳
  D

vZbT̐݌vjl2-1ĹD2-1ł̖_ƂẮC
݃nh^XNւ̃^[Ƀ[h̕ύXȉ̗lɑ邱
ƂD

1.݃nh               : Handler[h
2.^XNOnȟĂяo : Thread[h
3.^XNւ̃^[       : Handler[h
4.^XN̍ĊJ                 : Thread[h

3Handler[hɈڍsKv̂́COt[pĕA
ɂ́CHandler[hŗO^[sKv邽߂łDARM
́CWX^̃[hCPSR̕A𓯎ɍs邪CM3͍sȂ߁C
̕@Ŋݐ̃^XNɃ^[KvD

2-2̏ꍇ̊݃nh^XNւ̃^[Ƀ[h̕ύXȉ
ɎD܂C2-2ł͊ݗDx̍Œl^XN̎s̗DxƂ
ăU[uKvD

1.݃nh               : Handler[h
2.NVICDx}XN'0'0     : Thread[h
3.ŒDxHandler[h  : Handler[h
4.^XNOnȟĂяo : Handler[h
5.^XNւ̃^[̑O   : Thread[h
3.^XNւ̃^[           : Handler[h
4.^XN̍ĊJ                 : Handler[h

݃nh^XÑ^[ɊւẮC2-2łĂC2s
ꍇɁCNVICDx}XN'0'ɂ邽߁CO^[sKv
D܂CNVIĈC݂̃lXg񐔂ǗĂ邽߁C34
ւ̑Jڂ̂߂ɁCO/݂tԂɂKv邽
߁CʓI2-1ȏ̑JڂKvƂȂD

2-2̏ꍇ́CMSPgȂ߁C݂̓ŃlXg񐔂𔻒fāC
X^bNւKvD

HRPŃیpꍇ2-1ƂȂD

ȏ̗RɂC2-1̗pD2-1́CJ[lNIDLE[
v̈KvDɂĂ͕ʓrc_D


3.fBXpb`̎s[h

 3-1
  Thread[hŎs

 3-2
  Handler[hŎs

fBXpb`Thread[hŎsƁC݂ɂvGvg
^XNɖ߂ꍇ͎̂悤ȃpXɂȂD

 1. fBXpb`Ăяo : Thread[h 
 2. fBXpb`s     : Thread[h
 3. ^XNOs         : Thread[h
 4D^XNւ̃^[ : Handler[h
 5. ^XN̍ĊJ           : Thread[h

݃nh玩fBXpb`^XNփ^[ꍇ͎̃p
XɂȂD

 1.݃nh               : Handler[h
 2.fBXpb`s           : Thread[h
 3.^XNOnȟĂяo : Thread[h
 4.^XNւ̃^[           : Handler[h
 5.^XN̍ĊJ                 : Thread[h

CfBXpb`Handler[hŎsƁC݂ɂvG
vgꂽ^XNɖ߂ꍇ͎̂悤ȃpXɂȂD

 1. fBXpb`Ăяo : Thread[h 
 2. fBXpb`s     : Handler[h
 3. ^XNOs         : Thread[h
 4D^XNւ̃^[     : Handler[h
 5. ^XN̍ĊJ           : Thread[h

݃nh̏o玩fBXpb`^XNփ^[ꍇ
̃pXɂȂD

 1.݃nh               : Handler[h
 2.fBXpb`s           : Handler[h
 3.^XNOnȟĂяo : Thread[h
 4.^XNւ̃^[           : Handler[h
 5.^XN̍ĊJ                 : Thread[h

^XNOnhȂOS̏ꍇ́CHandler[hŎs[h
̑Jڂ̉񐔂邪C^XNOnhƁCThread[h̕J
ډ񐔂邽߁CThread[hƂD

یlƁCfBXpb`Handler[hœ삳
悢ƍliSVCŃnhĂяoHandler[hƂȂ邽
߁jD


4.X^bN̎g

 4-1
  ^XNReLXgPSP, ^XNReLXgMSP
 4-2
  ^XNReLXgC^XNReLXgMSP

4-2̏ꍇC݂̓ŃlXg񐔂𔻒fāCX^bNւ
KvD2Ń^XNReLXgThread[hC^XNReLXg
Handler[hœ삳Ƃ߁C4-1̗pƁC݂̓
ŎIɃX^bN؂ւDThread[hłPSP̃ANZXC
mrs/msr߂ōs邽߁C4-1̗pD


5.ReLXg̔

 5-1
  IPSR'0'(Thread[h)Ȃ^XN^XNReLXgC'1'(Handler[
  h)Ȃ^XNReLXgƂD

 5-2
  ݂̃lXg񐔂ێϐpӁD1ȏŔ^XNReLXgD

 5-3
  ANeBuȃX^bNɂ蔻fiMSPȂ^XNReLXgCPSPȂ
  ^XNReLXgƂj

5-1́C\tgEFAŃReLXgǗ̂߂̏sKvȂ
bgDȂCJ[l̋NThread[hł邽
߁CHandler[hֈڍsKvDASPJ[lł́CIDLE[vs
͔^XNReLXgƂē삳Kv邽߁CIDLE[v
Handler[hœ삳KvDIDLE[v̓fBXpb`
яoD3Œ߂悤ɁCfBXpb`Thread[hœ삳
߁CIDLE[vĂяoۂɂ́CHandler[h֑JڂKvD
Handler[hւ̑Jڂ́CSVC/PendSVCpƎ\ł邪C6̊
݂ɃvGvgꂽ^XNւ̃^[Handler[hւ̈ڍs
SVC/PendSVC̎gpKvƂȂ邽߁CSVCnhł́Cǂ̖ړIŌĂяo
ꂽ肷KvoĂ邽߁CI[owbh傷D

5-2ł́CJ[lNIDLE[vɕϐ'1'ɐݒ肷΂悢Ƃ
ȂD̏ꍇCJ[lNIDLE[vThread[hŎsĂ
ɖ肪Ȃ悤CɊ݂̏o̐݌v𒍈ӂKvD

J[lNɊւẮCS݂֎~ĂC݂Ȃ̂
ɖ͂ȂDIDLE[v́CThread[hMSPPSP̑I\ł
邱Ƃ𗘗pāC^XNReLXg̃X^bNłMSPɕύXD
O/݂̓ł́Cd݂ł邩EXC_RETURÑ[h
rbgł͂ȂCX^bN̔rbgōsΖȂDO/݂
̃^[ɊւẮCd݂̔́CƓlEXC_RETURÑX
^bNrbgōs΂悢DO^[pcɑ
EXC_RETURN̒lꗥ0xfffffffd (Thread[h with MSP)Ƃ̂ł͂ȂC
O/ݎtLRɐݒ肳EXC_RETURNp邱ƂɂCIDLE
[vɊ荞񂾏ꍇłȂ^[D

J[lŃCMSPANeBułC݃nhsHandler
[hł邱ƂMSPANeBułCIDLE[vMSPANeBu
ɐݒ肷ƁC^XNReLXg͑SāCMSPANeBuɂē삷
邱ƂɂȂD܂Cݎ͊ݑOɃANeBuȃX^bN̏񂪁C
EXC_RETURNɐݒ肳D̂߁CReLXg̔́C݃lXg
ێϐȂƂCANeBuȃX^bN΂悢ƂɂȂD
܂Cexc_sense_context()ɊւẮCOt[EXC_RETURNǉ
C̓eɂ蔻f΂悢Dȏ̗RɂC5-3̗pD


6.݂ɃvGvgꂽ^XNւ̃^[Handler[hւ̈
  s@

 6-1
  SVCp
 6-2
  PendSVCp

PendSVCSVC̈Ⴂ́CPendSVCvL[COCSVC͗vL
[COȂƂłD݂ɃvGvgꂽ^XNւ̃^[
Handler[hւ̈ڍśCL[COꂸɑɏK
v邽߁CǂŎĂȂDǂJ[l̃\[X
Ďgp邩̑IłD

ǂgƂĂCDx̐ݒ肪ƂȂDfBXpb`犄
݂ɃvGvgꂽ^XNւ̃^[܂ł̏́CȂƂCPU
bNԂŎsȂ΂ȂȂDSVCPendSVC͂ǂݗDx
߁CNVICDx}XNBASEPRIDx}XN̕ꍇC
ȂD

CPUbNԂBASEPRI̐ݒŎꍇC̐ݒlSVCPendSVC
ݒ肵lႭKvDƁCSVCPendSVC̗Dx
CPUbN̗Dx}XN̒l荂li݂̊荂Dxj
KvD

CPUbNԂFAULTMASKPRIMASKŎꍇ́C炪ݒ肳
ƁCSVCPendSVCtȂ߁CBASEPRIɂ芄݂}
XN悤ɐݒ肷KvD̏ꍇCSVCPendSVC͑̊
荂Dxݒ肷KvD

ȏɂCHandler[hւ̈ڍŝ߂ɂ́CCPUbNԂBASEPRI
CSVCPendSVCɐݒ肷DxJ[lǗ̍ōDx
Dxɐݒ肷KvD


7. O/ݏoł̑d݂̔f

7-1
 EXC_RETURÑ[hrbg
7-2
 EXC_RETURÑX^bNrbg
7-3
 ݃lXg񐔂̊Ǘϐ

O/ݎt́CtO/݈ȉ݂̊͋֎~邪CS
݋֎~Ԃɂ͂ȂȂD̂߁C݃lXg񐔂̊ǗϐC
NgOɊ݂\邽߁C7-3͎gp邱Ƃ
ȂD

5ŋc_ʂCIDLE[vThread[hŎs邽߁C7-1ł͂ȂC
7-2ŔfKvD


8. IDLE[v

8-1
 Thread[hŎs
8-2
 Handler[hŎs

5ŋc_ʂCThread[hŎsłI[owbhD
CThread[hŎsĂC荞݂̏oŐ^XNRe
LXgƔł΁CThread[hŖȂD


9DJ[lǗO݂̊̃T|[g

9-1
 J[lǗO݂̊T|[gȂ
9-2
 J[lǗO݂̊T|[g

xN^e[uT|[gĂC݃nhCŋLq\ł
邽߁CT|[geՂł邽߁CT|[gD


10. CPUbN

10-1
 BASEPRIgp 
10-2 
 FAULTMASK/PRIMASKgp

J[l̊ǗO݂̊T|[gȂCBASEPRIgpKv
D


11. ݃bNCPUO̊֌W

11-1
 BASEPRIgp 
11-2 
 FAULTMASK/PRIMASKgp 

FAULTMASK/PRIMASKgpƁCNMI  Hardware Fault ȊOCPUO
~Ă܂D

BASEPRIpƁC݃bNɂCPUOtꍇ́C
BASEPRIpāCōDxCPUÔ߂ɃU[uKvD

݃bNCCPUOt悤ɂBASEPRIgpK
vD

IRON4.0dl3.5.3ł́CCPUO̗Dx͎̂悤ɒ߂ĂD

"CPUOnh̗D揇ʂ́CCPUO̗DxƁCfBX
pb`̗D揇ʂ̂ꂩD"

CPUO̗DxƂ̂ŁCCPUbN⊄݃
bNԂ̃^XNŔꍇłCD悵ĎsׂƂl
D

CTOPPERSWݏf̎dlł́CCPUÓCvZbT
ɈقȂ邽߁CCPUȌf̕W̑ΏۊOƂĂD
߁CARM-Mł̈߂āC}jAɖL΂悢ƍlD


12. ODxƓDx̕ϊ

ODxƂAPIŎw肷銄ݗDx(PRI^)̂ƂłCl
قǗDxD݃nhɂ́C-1A̒lݒ\
DDx́CBASEPRINVIC̗DxWX^ɐݒ肷lłD

銄ݗDx̃rbg TBITW_IPRI ƂƁCݒ\ȊO
Dx͎̂悤ɂȂD

  TIPM_ENAALLi0j` -(1 << TBITW_IPRI)


13. J[lǗ̍ōDx(CPUbNԂł̗Dx}XN)

6.ŏqׂ悤ɁC݂̏oSVCnhĂяoKv邽߁C
SVCnhCPUbNԂBASEPRIɐݒ肷Dx}XN荂Dx
ݒ肷KvD

銄ݗDx̃rbg TBITW_IPRICDx̃TuDx
rbgTBIT_IPRIƂƁCCPUbNԁiJ[lǗ݂ɐݒ
\ȍōDxjƂĎw\ȗDx}XN̐ݒ͈͈͂ȉ̒l̔
͂ƂȂD

    -(2^(TBIW_IPRI)) + (2^TBITW_SUBIPRI)) ` -1


14. ۑ

E݃bNCPUO̊֌W
  BASEPRIgƂĂCCPUOɑ̗OƁC
  ̗O͎󂯕tȂ߁CITRONdl͖ȂD
  ->߂ă}jALڂɓ邩.
  veNV̗O}XN\ł邽ߗvD


ȏD
