/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|*  * BPF Disassembler                                                        *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/LEB128.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include <assert.h>

namespace {

// InsnBitWidth is essentially a type trait used by the decoder emitter to query
// the supported bitwidth for a given type. But default, the value is 0, making
// it an invalid type for use as `InsnType` when instantiating the decoder.
// Individual targets are expected to provide specializations for these based
// on their usage.
template <typename T> constexpr uint32_t InsnBitWidth = 0;

static const uint8_t DecoderTableBPF64[1279] = {
  OPC_SwitchField, 56, 8,                    //    0: switch Inst[63:56] {
  4, 8,                                      //    3: case 0x4: {
  OPC_CheckField, 32, 16, 0,                 //    5:  check Inst[47:32] == 0x0
  OPC_Decode, 209, 2, 0,                     //    9:  decode to ADD_ri_32 using decoder 0
                                             //    9: }
  5, 4,                                      //   13: case 0x5: {
  OPC_Decode, 239, 2, 1,                     //   15:  decode to JMP using decoder 1
                                             //   15: }
  6, 4,                                      //   19: case 0x6: {
  OPC_Decode, 240, 2, 2,                     //   21:  decode to JMPL using decoder 2
                                             //   21: }
  7, 8,                                      //   25: case 0x7: {
  OPC_CheckField, 32, 16, 0,                 //   27:  check Inst[47:32] == 0x0
  OPC_Decode, 208, 2, 3,                     //   31:  decode to ADD_ri using decoder 3
                                             //   31: }
  12, 8,                                     //   35: case 0xc: {
  OPC_CheckField, 32, 16, 0,                 //   37:  check Inst[47:32] == 0x0
  OPC_Decode, 211, 2, 4,                     //   41:  decode to ADD_rr_32 using decoder 4
                                             //   41: }
  13, 4,                                     //   45: case 0xd: {
  OPC_Decode, 153, 3, 5,                     //   47:  decode to JX using decoder 5
                                             //   47: }
  15, 8,                                     //   51: case 0xf: {
  OPC_CheckField, 32, 16, 0,                 //   53:  check Inst[47:32] == 0x0
  OPC_Decode, 210, 2, 6,                     //   57:  decode to ADD_rr using decoder 6
                                             //   57: }
  20, 8,                                     //   61: case 0x14: {
  OPC_CheckField, 32, 16, 0,                 //   63:  check Inst[47:32] == 0x0
  OPC_Decode, 241, 3, 0,                     //   67:  decode to SUB_ri_32 using decoder 0
                                             //   67: }
  21, 4,                                     //   71: case 0x15: {
  OPC_Decode, 235, 2, 7,                     //   73:  decode to JEQ_ri using decoder 7
                                             //   73: }
  22, 4,                                     //   77: case 0x16: {
  OPC_Decode, 236, 2, 8,                     //   79:  decode to JEQ_ri_32 using decoder 8
                                             //   79: }
  23, 8,                                     //   83: case 0x17: {
  OPC_CheckField, 32, 16, 0,                 //   85:  check Inst[47:32] == 0x0
  OPC_Decode, 240, 3, 3,                     //   89:  decode to SUB_ri using decoder 3
                                             //   89: }
  24, 18,                                    //   93: case 0x18: {
  OPC_CheckField, 32, 16, 0,                 //   95:  check Inst[47:32] == 0x0
  OPC_Scope, 8,                              //   99:  try {
  OPC_CheckField, 52, 4, 0,                  //  101:   check Inst[55:52] == 0x0
  OPC_Decode, 174, 3, 9,                     //  105:   decode to LD_imm64 using decoder 9
                                             //  105:  } else try {
  OPC_Decode, 175, 3, 10,                    //  109:   decode to LD_pseudo using decoder 10
                                             //  109:  }
                                             //  109: }
  28, 8,                                     //  113: case 0x1c: {
  OPC_CheckField, 32, 16, 0,                 //  115:  check Inst[47:32] == 0x0
  OPC_Decode, 243, 3, 4,                     //  119:  decode to SUB_rr_32 using decoder 4
                                             //  119: }
  29, 4,                                     //  123: case 0x1d: {
  OPC_Decode, 237, 2, 11,                    //  125:  decode to JEQ_rr using decoder 11
                                             //  125: }
  30, 4,                                     //  129: case 0x1e: {
  OPC_Decode, 238, 2, 12,                    //  131:  decode to JEQ_rr_32 using decoder 12
                                             //  131: }
  31, 8,                                     //  135: case 0x1f: {
  OPC_CheckField, 32, 16, 0,                 //  137:  check Inst[47:32] == 0x0
  OPC_Decode, 242, 3, 6,                     //  141:  decode to SUB_rr using decoder 6
                                             //  141: }
  32, 4,                                     //  145: case 0x20: {
  OPC_Decode, 170, 3, 2,                     //  147:  decode to LD_ABS_W using decoder 2
                                             //  147: }
  36, 8,                                     //  151: case 0x24: {
  OPC_CheckField, 32, 16, 0,                 //  153:  check Inst[47:32] == 0x0
  OPC_Decode, 194, 3, 0,                     //  157:  decode to MUL_ri_32 using decoder 0
                                             //  157: }
  37, 4,                                     //  161: case 0x25: {
  OPC_Decode, 141, 3, 7,                     //  163:  decode to JUGT_ri using decoder 7
                                             //  163: }
  38, 4,                                     //  167: case 0x26: {
  OPC_Decode, 142, 3, 8,                     //  169:  decode to JUGT_ri_32 using decoder 8
                                             //  169: }
  39, 8,                                     //  173: case 0x27: {
  OPC_CheckField, 32, 16, 0,                 //  175:  check Inst[47:32] == 0x0
  OPC_Decode, 193, 3, 3,                     //  179:  decode to MUL_ri using decoder 3
                                             //  179: }
  40, 4,                                     //  183: case 0x28: {
  OPC_Decode, 169, 3, 2,                     //  185:  decode to LD_ABS_H using decoder 2
                                             //  185: }
  44, 8,                                     //  189: case 0x2c: {
  OPC_CheckField, 32, 16, 0,                 //  191:  check Inst[47:32] == 0x0
  OPC_Decode, 196, 3, 4,                     //  195:  decode to MUL_rr_32 using decoder 4
                                             //  195: }
  45, 4,                                     //  199: case 0x2d: {
  OPC_Decode, 143, 3, 11,                    //  201:  decode to JUGT_rr using decoder 11
                                             //  201: }
  46, 4,                                     //  205: case 0x2e: {
  OPC_Decode, 144, 3, 12,                    //  207:  decode to JUGT_rr_32 using decoder 12
                                             //  207: }
  47, 8,                                     //  211: case 0x2f: {
  OPC_CheckField, 32, 16, 0,                 //  213:  check Inst[47:32] == 0x0
  OPC_Decode, 195, 3, 6,                     //  217:  decode to MUL_rr using decoder 6
                                             //  217: }
  48, 4,                                     //  221: case 0x30: {
  OPC_Decode, 168, 3, 2,                     //  223:  decode to LD_ABS_B using decoder 2
                                             //  223: }
  52, 15,                                    //  227: case 0x34: {
  OPC_SwitchField, 32, 16,                   //  229:  switch Inst[47:32] {
  0, 4,                                      //  232:  case 0x0: {
  OPC_Decode, 229, 2, 0,                     //  234:   decode to DIV_ri_32 using decoder 0
                                             //  234:  }
  1, 0,                                      //  238:  case 0x1: {
  OPC_Decode, 206, 3, 0,                     //  240:   decode to SDIV_ri_32 using decoder 0
                                             //  240:  }
                                             //  240:  } // switch Inst[47:32]
                                             //  240: }
  53, 4,                                     //  244: case 0x35: {
  OPC_Decode, 137, 3, 7,                     //  246:  decode to JUGE_ri using decoder 7
                                             //  246: }
  54, 4,                                     //  250: case 0x36: {
  OPC_Decode, 138, 3, 8,                     //  252:  decode to JUGE_ri_32 using decoder 8
                                             //  252: }
  55, 15,                                    //  256: case 0x37: {
  OPC_SwitchField, 32, 16,                   //  258:  switch Inst[47:32] {
  0, 4,                                      //  261:  case 0x0: {
  OPC_Decode, 228, 2, 3,                     //  263:   decode to DIV_ri using decoder 3
                                             //  263:  }
  1, 0,                                      //  267:  case 0x1: {
  OPC_Decode, 205, 3, 3,                     //  269:   decode to SDIV_ri using decoder 3
                                             //  269:  }
                                             //  269:  } // switch Inst[47:32]
                                             //  269: }
  60, 15,                                    //  273: case 0x3c: {
  OPC_SwitchField, 32, 16,                   //  275:  switch Inst[47:32] {
  0, 4,                                      //  278:  case 0x0: {
  OPC_Decode, 231, 2, 4,                     //  280:   decode to DIV_rr_32 using decoder 4
                                             //  280:  }
  1, 0,                                      //  284:  case 0x1: {
  OPC_Decode, 208, 3, 4,                     //  286:   decode to SDIV_rr_32 using decoder 4
                                             //  286:  }
                                             //  286:  } // switch Inst[47:32]
                                             //  286: }
  61, 4,                                     //  290: case 0x3d: {
  OPC_Decode, 139, 3, 11,                    //  292:  decode to JUGE_rr using decoder 11
                                             //  292: }
  62, 4,                                     //  296: case 0x3e: {
  OPC_Decode, 140, 3, 12,                    //  298:  decode to JUGE_rr_32 using decoder 12
                                             //  298: }
  63, 15,                                    //  302: case 0x3f: {
  OPC_SwitchField, 32, 16,                   //  304:  switch Inst[47:32] {
  0, 4,                                      //  307:  case 0x0: {
  OPC_Decode, 230, 2, 6,                     //  309:   decode to DIV_rr using decoder 6
                                             //  309:  }
  1, 0,                                      //  313:  case 0x1: {
  OPC_Decode, 207, 3, 6,                     //  315:   decode to SDIV_rr using decoder 6
                                             //  315:  }
                                             //  315:  } // switch Inst[47:32]
                                             //  315: }
  64, 4,                                     //  319: case 0x40: {
  OPC_Decode, 173, 3, 13,                    //  321:  decode to LD_IND_W using decoder 13
                                             //  321: }
  68, 8,                                     //  325: case 0x44: {
  OPC_CheckField, 32, 16, 0,                 //  327:  check Inst[47:32] == 0x0
  OPC_Decode, 201, 3, 0,                     //  331:  decode to OR_ri_32 using decoder 0
                                             //  331: }
  69, 4,                                     //  335: case 0x45: {
  OPC_Decode, 245, 2, 7,                     //  337:  decode to JSET_ri using decoder 7
                                             //  337: }
  70, 4,                                     //  341: case 0x46: {
  OPC_Decode, 246, 2, 8,                     //  343:  decode to JSET_ri_32 using decoder 8
                                             //  343: }
  71, 8,                                     //  347: case 0x47: {
  OPC_CheckField, 32, 16, 0,                 //  349:  check Inst[47:32] == 0x0
  OPC_Decode, 200, 3, 3,                     //  353:  decode to OR_ri using decoder 3
                                             //  353: }
  72, 4,                                     //  357: case 0x48: {
  OPC_Decode, 172, 3, 13,                    //  359:  decode to LD_IND_H using decoder 13
                                             //  359: }
  76, 8,                                     //  363: case 0x4c: {
  OPC_CheckField, 32, 16, 0,                 //  365:  check Inst[47:32] == 0x0
  OPC_Decode, 203, 3, 4,                     //  369:  decode to OR_rr_32 using decoder 4
                                             //  369: }
  77, 4,                                     //  373: case 0x4d: {
  OPC_Decode, 247, 2, 11,                    //  375:  decode to JSET_rr using decoder 11
                                             //  375: }
  78, 4,                                     //  379: case 0x4e: {
  OPC_Decode, 248, 2, 12,                    //  381:  decode to JSET_rr_32 using decoder 12
                                             //  381: }
  79, 8,                                     //  385: case 0x4f: {
  OPC_CheckField, 32, 16, 0,                 //  387:  check Inst[47:32] == 0x0
  OPC_Decode, 202, 3, 6,                     //  391:  decode to OR_rr using decoder 6
                                             //  391: }
  80, 4,                                     //  395: case 0x50: {
  OPC_Decode, 171, 3, 13,                    //  397:  decode to LD_IND_B using decoder 13
                                             //  397: }
  84, 8,                                     //  401: case 0x54: {
  OPC_CheckField, 32, 16, 0,                 //  403:  check Inst[47:32] == 0x0
  OPC_Decode, 213, 2, 0,                     //  407:  decode to AND_ri_32 using decoder 0
                                             //  407: }
  85, 4,                                     //  411: case 0x55: {
  OPC_Decode, 241, 2, 7,                     //  413:  decode to JNE_ri using decoder 7
                                             //  413: }
  86, 4,                                     //  417: case 0x56: {
  OPC_Decode, 242, 2, 8,                     //  419:  decode to JNE_ri_32 using decoder 8
                                             //  419: }
  87, 8,                                     //  423: case 0x57: {
  OPC_CheckField, 32, 16, 0,                 //  425:  check Inst[47:32] == 0x0
  OPC_Decode, 212, 2, 3,                     //  429:  decode to AND_ri using decoder 3
                                             //  429: }
  92, 8,                                     //  433: case 0x5c: {
  OPC_CheckField, 32, 16, 0,                 //  435:  check Inst[47:32] == 0x0
  OPC_Decode, 215, 2, 4,                     //  439:  decode to AND_rr_32 using decoder 4
                                             //  439: }
  93, 4,                                     //  443: case 0x5d: {
  OPC_Decode, 243, 2, 11,                    //  445:  decode to JNE_rr using decoder 11
                                             //  445: }
  94, 4,                                     //  449: case 0x5e: {
  OPC_Decode, 244, 2, 12,                    //  451:  decode to JNE_rr_32 using decoder 12
                                             //  451: }
  95, 8,                                     //  455: case 0x5f: {
  OPC_CheckField, 32, 16, 0,                 //  457:  check Inst[47:32] == 0x0
  OPC_Decode, 214, 2, 6,                     //  461:  decode to AND_rr using decoder 6
                                             //  461: }
  97, 4,                                     //  465: case 0x61: {
  OPC_Decode, 164, 3, 14,                    //  467:  decode to LDW using decoder 14
                                             //  467: }
  98, 4,                                     //  471: case 0x62: {
  OPC_Decode, 239, 3, 15,                    //  473:  decode to STW_imm using decoder 15
                                             //  473: }
  99, 4,                                     //  477: case 0x63: {
  OPC_Decode, 236, 3, 16,                    //  479:  decode to STW using decoder 16
                                             //  479: }
  100, 8,                                    //  483: case 0x64: {
  OPC_CheckField, 32, 16, 0,                 //  485:  check Inst[47:32] == 0x0
  OPC_Decode, 210, 3, 0,                     //  489:  decode to SLL_ri_32 using decoder 0
                                             //  489: }
  101, 4,                                    //  493: case 0x65: {
  OPC_Decode, 253, 2, 7,                     //  495:  decode to JSGT_ri using decoder 7
                                             //  495: }
  102, 4,                                    //  499: case 0x66: {
  OPC_Decode, 254, 2, 8,                     //  501:  decode to JSGT_ri_32 using decoder 8
                                             //  501: }
  103, 8,                                    //  505: case 0x67: {
  OPC_CheckField, 32, 16, 0,                 //  507:  check Inst[47:32] == 0x0
  OPC_Decode, 209, 3, 3,                     //  511:  decode to SLL_ri using decoder 3
                                             //  511: }
  105, 4,                                    //  515: case 0x69: {
  OPC_Decode, 160, 3, 14,                    //  517:  decode to LDH using decoder 14
                                             //  517: }
  106, 4,                                    //  521: case 0x6a: {
  OPC_Decode, 235, 3, 15,                    //  523:  decode to STH_imm using decoder 15
                                             //  523: }
  107, 4,                                    //  527: case 0x6b: {
  OPC_Decode, 232, 3, 16,                    //  529:  decode to STH using decoder 16
                                             //  529: }
  108, 8,                                    //  533: case 0x6c: {
  OPC_CheckField, 32, 16, 0,                 //  535:  check Inst[47:32] == 0x0
  OPC_Decode, 212, 3, 4,                     //  539:  decode to SLL_rr_32 using decoder 4
                                             //  539: }
  109, 4,                                    //  543: case 0x6d: {
  OPC_Decode, 255, 2, 11,                    //  545:  decode to JSGT_rr using decoder 11
                                             //  545: }
  110, 4,                                    //  549: case 0x6e: {
  OPC_Decode, 128, 3, 12,                    //  551:  decode to JSGT_rr_32 using decoder 12
                                             //  551: }
  111, 8,                                    //  555: case 0x6f: {
  OPC_CheckField, 32, 16, 0,                 //  557:  check Inst[47:32] == 0x0
  OPC_Decode, 211, 3, 6,                     //  561:  decode to SLL_rr using decoder 6
                                             //  561: }
  113, 4,                                    //  565: case 0x71: {
  OPC_Decode, 154, 3, 14,                    //  567:  decode to LDB using decoder 14
                                             //  567: }
  114, 4,                                    //  571: case 0x72: {
  OPC_Decode, 228, 3, 15,                    //  573:  decode to STB_imm using decoder 15
                                             //  573: }
  115, 4,                                    //  577: case 0x73: {
  OPC_Decode, 225, 3, 16,                    //  579:  decode to STB using decoder 16
                                             //  579: }
  116, 8,                                    //  583: case 0x74: {
  OPC_CheckField, 32, 16, 0,                 //  585:  check Inst[47:32] == 0x0
  OPC_Decode, 222, 3, 0,                     //  589:  decode to SRL_ri_32 using decoder 0
                                             //  589: }
  117, 4,                                    //  593: case 0x75: {
  OPC_Decode, 249, 2, 7,                     //  595:  decode to JSGE_ri using decoder 7
                                             //  595: }
  118, 4,                                    //  599: case 0x76: {
  OPC_Decode, 250, 2, 8,                     //  601:  decode to JSGE_ri_32 using decoder 8
                                             //  601: }
  119, 8,                                    //  605: case 0x77: {
  OPC_CheckField, 32, 16, 0,                 //  607:  check Inst[47:32] == 0x0
  OPC_Decode, 221, 3, 3,                     //  611:  decode to SRL_ri using decoder 3
                                             //  611: }
  121, 4,                                    //  615: case 0x79: {
  OPC_Decode, 158, 3, 14,                    //  617:  decode to LDD using decoder 14
                                             //  617: }
  122, 4,                                    //  621: case 0x7a: {
  OPC_Decode, 231, 3, 15,                    //  623:  decode to STD_imm using decoder 15
                                             //  623: }
  123, 4,                                    //  627: case 0x7b: {
  OPC_Decode, 229, 3, 16,                    //  629:  decode to STD using decoder 16
                                             //  629: }
  124, 8,                                    //  633: case 0x7c: {
  OPC_CheckField, 32, 16, 0,                 //  635:  check Inst[47:32] == 0x0
  OPC_Decode, 224, 3, 4,                     //  639:  decode to SRL_rr_32 using decoder 4
                                             //  639: }
  125, 4,                                    //  643: case 0x7d: {
  OPC_Decode, 251, 2, 11,                    //  645:  decode to JSGE_rr using decoder 11
                                             //  645: }
  126, 4,                                    //  649: case 0x7e: {
  OPC_Decode, 252, 2, 12,                    //  651:  decode to JSGE_rr_32 using decoder 12
                                             //  651: }
  127, 8,                                    //  655: case 0x7f: {
  OPC_CheckField, 32, 16, 0,                 //  657:  check Inst[47:32] == 0x0
  OPC_Decode, 223, 3, 6,                     //  661:  decode to SRL_rr using decoder 6
                                             //  661: }
  129, 1, 4,                                 //  665: case 0x81: {
  OPC_Decode, 167, 3, 14,                    //  668:  decode to LDWSX using decoder 14
                                             //  668: }
  132, 1, 4,                                 //  672: case 0x84: {
  OPC_Decode, 197, 3, 17,                    //  675:  decode to NEG_32 using decoder 17
                                             //  675: }
  133, 1, 4,                                 //  679: case 0x85: {
  OPC_Decode, 232, 2, 2,                     //  682:  decode to JAL using decoder 2
                                             //  682: }
  135, 1, 4,                                 //  686: case 0x87: {
  OPC_Decode, 198, 3, 18,                    //  689:  decode to NEG_64 using decoder 18
                                             //  689: }
  137, 1, 4,                                 //  693: case 0x89: {
  OPC_Decode, 163, 3, 14,                    //  696:  decode to LDHSX using decoder 14
                                             //  696: }
  141, 1, 4,                                 //  700: case 0x8d: {
  OPC_Decode, 233, 2, 5,                     //  703:  decode to JALX using decoder 5
                                             //  703: }
  145, 1, 4,                                 //  707: case 0x91: {
  OPC_Decode, 157, 3, 14,                    //  710:  decode to LDBSX using decoder 14
                                             //  710: }
  148, 1, 15,                                //  714: case 0x94: {
  OPC_SwitchField, 32, 16,                   //  717:  switch Inst[47:32] {
  0, 4,                                      //  720:  case 0x0: {
  OPC_Decode, 180, 3, 0,                     //  722:   decode to MOD_ri_32 using decoder 0
                                             //  722:  }
  1, 0,                                      //  726:  case 0x1: {
  OPC_Decode, 214, 3, 0,                     //  728:   decode to SMOD_ri_32 using decoder 0
                                             //  728:  }
                                             //  728:  } // switch Inst[47:32]
                                             //  728: }
  149, 1, 8,                                 //  732: case 0x95: {
  OPC_CheckField, 0, 32, 0,                  //  735:  check Inst[31:0] == 0x0
  OPC_Decode, 204, 3, 19,                    //  739:  decode to RET using decoder 19
                                             //  739: }
  151, 1, 15,                                //  743: case 0x97: {
  OPC_SwitchField, 32, 16,                   //  746:  switch Inst[47:32] {
  0, 4,                                      //  749:  case 0x0: {
  OPC_Decode, 179, 3, 3,                     //  751:   decode to MOD_ri using decoder 3
                                             //  751:  }
  1, 0,                                      //  755:  case 0x1: {
  OPC_Decode, 213, 3, 3,                     //  757:   decode to SMOD_ri using decoder 3
                                             //  757:  }
                                             //  757:  } // switch Inst[47:32]
                                             //  757: }
  156, 1, 15,                                //  761: case 0x9c: {
  OPC_SwitchField, 32, 16,                   //  764:  switch Inst[47:32] {
  0, 4,                                      //  767:  case 0x0: {
  OPC_Decode, 182, 3, 4,                     //  769:   decode to MOD_rr_32 using decoder 4
                                             //  769:  }
  1, 0,                                      //  773:  case 0x1: {
  OPC_Decode, 216, 3, 4,                     //  775:   decode to SMOD_rr_32 using decoder 4
                                             //  775:  }
                                             //  775:  } // switch Inst[47:32]
                                             //  775: }
  159, 1, 15,                                //  779: case 0x9f: {
  OPC_SwitchField, 32, 16,                   //  782:  switch Inst[47:32] {
  0, 4,                                      //  785:  case 0x0: {
  OPC_Decode, 181, 3, 6,                     //  787:   decode to MOD_rr using decoder 6
                                             //  787:  }
  1, 0,                                      //  791:  case 0x1: {
  OPC_Decode, 215, 3, 6,                     //  793:   decode to SMOD_rr using decoder 6
                                             //  793:  }
                                             //  793:  } // switch Inst[47:32]
                                             //  793: }
  164, 1, 8,                                 //  797: case 0xa4: {
  OPC_CheckField, 32, 16, 0,                 //  800:  check Inst[47:32] == 0x0
  OPC_Decode, 134, 4, 0,                     //  804:  decode to XOR_ri_32 using decoder 0
                                             //  804: }
  165, 1, 4,                                 //  808: case 0xa5: {
  OPC_Decode, 149, 3, 7,                     //  811:  decode to JULT_ri using decoder 7
                                             //  811: }
  166, 1, 4,                                 //  815: case 0xa6: {
  OPC_Decode, 150, 3, 8,                     //  818:  decode to JULT_ri_32 using decoder 8
                                             //  818: }
  167, 1, 8,                                 //  822: case 0xa7: {
  OPC_CheckField, 32, 16, 0,                 //  825:  check Inst[47:32] == 0x0
  OPC_Decode, 133, 4, 3,                     //  829:  decode to XOR_ri using decoder 3
                                             //  829: }
  172, 1, 8,                                 //  833: case 0xac: {
  OPC_CheckField, 32, 16, 0,                 //  836:  check Inst[47:32] == 0x0
  OPC_Decode, 136, 4, 4,                     //  840:  decode to XOR_rr_32 using decoder 4
                                             //  840: }
  173, 1, 4,                                 //  844: case 0xad: {
  OPC_Decode, 151, 3, 11,                    //  847:  decode to JULT_rr using decoder 11
                                             //  847: }
  174, 1, 4,                                 //  851: case 0xae: {
  OPC_Decode, 152, 3, 12,                    //  854:  decode to JULT_rr_32 using decoder 12
                                             //  854: }
  175, 1, 8,                                 //  858: case 0xaf: {
  OPC_CheckField, 32, 16, 0,                 //  861:  check Inst[47:32] == 0x0
  OPC_Decode, 135, 4, 6,                     //  865:  decode to XOR_rr using decoder 6
                                             //  865: }
  180, 1, 8,                                 //  869: case 0xb4: {
  OPC_CheckField, 32, 16, 0,                 //  872:  check Inst[47:32] == 0x0
  OPC_Decode, 190, 3, 20,                    //  876:  decode to MOV_ri_32 using decoder 20
                                             //  876: }
  181, 1, 4,                                 //  880: case 0xb5: {
  OPC_Decode, 145, 3, 7,                     //  883:  decode to JULE_ri using decoder 7
                                             //  883: }
  182, 1, 4,                                 //  887: case 0xb6: {
  OPC_Decode, 146, 3, 8,                     //  890:  decode to JULE_ri_32 using decoder 8
                                             //  890: }
  183, 1, 8,                                 //  894: case 0xb7: {
  OPC_CheckField, 32, 16, 0,                 //  897:  check Inst[47:32] == 0x0
  OPC_Decode, 189, 3, 9,                     //  901:  decode to MOV_ri using decoder 9
                                             //  901: }
  188, 1, 21,                                //  905: case 0xbc: {
  OPC_SwitchField, 32, 16,                   //  908:  switch Inst[47:32] {
  0, 4,                                      //  911:  case 0x0: {
  OPC_Decode, 192, 3, 21,                    //  913:   decode to MOV_rr_32 using decoder 21
                                             //  913:  }
  8, 4,                                      //  917:  case 0x8: {
  OPC_Decode, 186, 3, 21,                    //  919:   decode to MOVSX_rr_32_8 using decoder 21
                                             //  919:  }
  16, 0,                                     //  923:  case 0x10: {
  OPC_Decode, 185, 3, 21,                    //  925:   decode to MOVSX_rr_32_16 using decoder 21
                                             //  925:  }
                                             //  925:  } // switch Inst[47:32]
                                             //  925: }
  189, 1, 4,                                 //  929: case 0xbd: {
  OPC_Decode, 147, 3, 11,                    //  932:  decode to JULE_rr using decoder 11
                                             //  932: }
  190, 1, 4,                                 //  936: case 0xbe: {
  OPC_Decode, 148, 3, 12,                    //  939:  decode to JULE_rr_32 using decoder 12
                                             //  939: }
  191, 1, 33,                                //  943: case 0xbf: {
  OPC_SwitchField, 32, 16,                   //  946:  switch Inst[47:32] {
  0, 4,                                      //  949:  case 0x0: {
  OPC_Decode, 191, 3, 22,                    //  951:   decode to MOV_rr using decoder 22
                                             //  951:  }
  1, 4,                                      //  955:  case 0x1: {
  OPC_Decode, 207, 2, 23,                    //  957:   decode to ADDR_SPACE_CAST using decoder 23
                                             //  957:  }
  8, 4,                                      //  961:  case 0x8: {
  OPC_Decode, 187, 3, 22,                    //  963:   decode to MOVSX_rr_8 using decoder 22
                                             //  963:  }
  16, 4,                                     //  967:  case 0x10: {
  OPC_Decode, 183, 3, 22,                    //  969:   decode to MOVSX_rr_16 using decoder 22
                                             //  969:  }
  32, 0,                                     //  973:  case 0x20: {
  OPC_Decode, 184, 3, 22,                    //  975:   decode to MOVSX_rr_32 using decoder 22
                                             //  975:  }
                                             //  975:  } // switch Inst[47:32]
                                             //  975: }
  195, 1, 8,                                 //  979: case 0xc3: {
  OPC_CheckField, 4, 4, 0,                   //  982:  check Inst[7:4] == 0x0
  OPC_Decode, 245, 3, 24,                    //  986:  decode to XADDW using decoder 24
                                             //  986: }
  196, 1, 8,                                 //  990: case 0xc4: {
  OPC_CheckField, 32, 16, 0,                 //  993:  check Inst[47:32] == 0x0
  OPC_Decode, 218, 3, 0,                     //  997:  decode to SRA_ri_32 using decoder 0
                                             //  997: }
  197, 1, 4,                                 // 1001: case 0xc5: {
  OPC_Decode, 133, 3, 7,                     // 1004:  decode to JSLT_ri using decoder 7
                                             // 1004: }
  198, 1, 4,                                 // 1008: case 0xc6: {
  OPC_Decode, 134, 3, 8,                     // 1011:  decode to JSLT_ri_32 using decoder 8
                                             // 1011: }
  199, 1, 8,                                 // 1015: case 0xc7: {
  OPC_CheckField, 32, 16, 0,                 // 1018:  check Inst[47:32] == 0x0
  OPC_Decode, 217, 3, 3,                     // 1022:  decode to SRA_ri using decoder 3
                                             // 1022: }
  204, 1, 8,                                 // 1026: case 0xcc: {
  OPC_CheckField, 32, 16, 0,                 // 1029:  check Inst[47:32] == 0x0
  OPC_Decode, 220, 3, 4,                     // 1033:  decode to SRA_rr_32 using decoder 4
                                             // 1033: }
  205, 1, 4,                                 // 1037: case 0xcd: {
  OPC_Decode, 135, 3, 11,                    // 1040:  decode to JSLT_rr using decoder 11
                                             // 1040: }
  206, 1, 4,                                 // 1044: case 0xce: {
  OPC_Decode, 136, 3, 12,                    // 1047:  decode to JSLT_rr_32 using decoder 12
                                             // 1047: }
  207, 1, 8,                                 // 1051: case 0xcf: {
  OPC_CheckField, 32, 16, 0,                 // 1054:  check Inst[47:32] == 0x0
  OPC_Decode, 219, 3, 6,                     // 1058:  decode to SRA_rr using decoder 6
                                             // 1058: }
  212, 1, 21,                                // 1062: case 0xd4: {
  OPC_SwitchField, 0, 32,                    // 1065:  switch Inst[31:0] {
  16, 4,                                     // 1068:  case 0x10: {
  OPC_Decode, 176, 3, 18,                    // 1070:   decode to LE16 using decoder 18
                                             // 1070:  }
  32, 4,                                     // 1074:  case 0x20: {
  OPC_Decode, 177, 3, 18,                    // 1076:   decode to LE32 using decoder 18
                                             // 1076:  }
  64, 0,                                     // 1080:  case 0x40: {
  OPC_Decode, 178, 3, 18,                    // 1082:   decode to LE64 using decoder 18
                                             // 1082:  }
                                             // 1082:  } // switch Inst[31:0]
                                             // 1082: }
  213, 1, 4,                                 // 1086: case 0xd5: {
  OPC_Decode, 129, 3, 7,                     // 1089:  decode to JSLE_ri using decoder 7
                                             // 1089: }
  214, 1, 4,                                 // 1093: case 0xd6: {
  OPC_Decode, 130, 3, 8,                     // 1096:  decode to JSLE_ri_32 using decoder 8
                                             // 1096: }
  215, 1, 21,                                // 1100: case 0xd7: {
  OPC_SwitchField, 0, 32,                    // 1103:  switch Inst[31:0] {
  16, 4,                                     // 1106:  case 0x10: {
  OPC_Decode, 219, 2, 18,                    // 1108:   decode to BSWAP16 using decoder 18
                                             // 1108:  }
  32, 4,                                     // 1112:  case 0x20: {
  OPC_Decode, 220, 2, 18,                    // 1114:   decode to BSWAP32 using decoder 18
                                             // 1114:  }
  64, 0,                                     // 1118:  case 0x40: {
  OPC_Decode, 221, 2, 18,                    // 1120:   decode to BSWAP64 using decoder 18
                                             // 1120:  }
                                             // 1120:  } // switch Inst[31:0]
                                             // 1120: }
  219, 1, 107,                               // 1124: case 0xdb: {
  OPC_SwitchField, 4, 4,                     // 1127:  switch Inst[7:4] {
  0, 24,                                     // 1130:  case 0x0: {
  OPC_Scope, 8,                              // 1132:   try {
  OPC_CheckField, 0, 4, 1,                   // 1134:    check Inst[3:0] == 0x1
  OPC_Decode, 251, 3, 24,                    // 1138:    decode to XFADDD using decoder 24
  OPC_Scope, 8,                              // 1142:   } else try {
  OPC_CheckField, 8, 1, 1,                   // 1144:    check Inst[8] == 0x1
  OPC_Decode, 159, 3, 14,                    // 1148:    decode to LDDACQ using decoder 14
                                             // 1148:   } else try {
  OPC_Decode, 244, 3, 24,                    // 1152:    decode to XADDD using decoder 24
                                             // 1152:   }
                                             // 1152:  }
  1, 8,                                      // 1156:  case 0x1: {
  OPC_CheckField, 8, 1, 1,                   // 1158:   check Inst[8] == 0x1
  OPC_Decode, 230, 3, 16,                    // 1162:   decode to STDREL using decoder 16
                                             // 1162:  }
  4, 14,                                     // 1166:  case 0x4: {
  OPC_Scope, 8,                              // 1168:   try {
  OPC_CheckField, 0, 4, 1,                   // 1170:    check Inst[3:0] == 0x1
  OPC_Decode, 255, 3, 24,                    // 1174:    decode to XFORD using decoder 24
                                             // 1174:   } else try {
  OPC_Decode, 131, 4, 24,                    // 1178:    decode to XORD using decoder 24
                                             // 1178:   }
                                             // 1178:  }
  5, 14,                                     // 1182:  case 0x5: {
  OPC_Scope, 8,                              // 1184:   try {
  OPC_CheckField, 0, 4, 1,                   // 1186:    check Inst[3:0] == 0x1
  OPC_Decode, 253, 3, 24,                    // 1190:    decode to XFANDD using decoder 24
                                             // 1190:   } else try {
  OPC_Decode, 247, 3, 24,                    // 1194:    decode to XANDD using decoder 24
                                             // 1194:   }
                                             // 1194:  }
  10, 14,                                    // 1198:  case 0xa: {
  OPC_Scope, 8,                              // 1200:   try {
  OPC_CheckField, 0, 4, 1,                   // 1202:    check Inst[3:0] == 0x1
  OPC_Decode, 129, 4, 24,                    // 1206:    decode to XFXORD using decoder 24
                                             // 1206:   } else try {
  OPC_Decode, 137, 4, 24,                    // 1210:    decode to XXORD using decoder 24
                                             // 1210:   }
                                             // 1210:  }
  14, 8,                                     // 1214:  case 0xe: {
  OPC_CheckField, 0, 4, 1,                   // 1216:   check Inst[3:0] == 0x1
  OPC_Decode, 249, 3, 24,                    // 1220:   decode to XCHGD using decoder 24
                                             // 1220:  }
  15, 0,                                     // 1224:  case 0xf: {
  OPC_CheckField, 0, 4, 1,                   // 1226:   check Inst[3:0] == 0x1
  OPC_Decode, 222, 2, 25,                    // 1230:   decode to CMPXCHGD using decoder 25
                                             // 1230:  }
                                             // 1230:  } // switch Inst[7:4]
                                             // 1230: }
  220, 1, 21,                                // 1234: case 0xdc: {
  OPC_SwitchField, 0, 32,                    // 1237:  switch Inst[31:0] {
  16, 4,                                     // 1240:  case 0x10: {
  OPC_Decode, 216, 2, 18,                    // 1242:   decode to BE16 using decoder 18
                                             // 1242:  }
  32, 4,                                     // 1246:  case 0x20: {
  OPC_Decode, 217, 2, 18,                    // 1248:   decode to BE32 using decoder 18
                                             // 1248:  }
  64, 0,                                     // 1252:  case 0x40: {
  OPC_Decode, 218, 2, 18,                    // 1254:   decode to BE64 using decoder 18
                                             // 1254:  }
                                             // 1254:  } // switch Inst[31:0]
                                             // 1254: }
  221, 1, 4,                                 // 1258: case 0xdd: {
  OPC_Decode, 131, 3, 11,                    // 1261:  decode to JSLE_rr using decoder 11
                                             // 1261: }
  222, 1, 4,                                 // 1265: case 0xde: {
  OPC_Decode, 132, 3, 12,                    // 1268:  decode to JSLE_rr_32 using decoder 12
                                             // 1268: }
  229, 1, 0,                                 // 1272: case 0xe5: {
  OPC_Decode, 234, 2, 1,                     // 1275:  decode to JCOND using decoder 1
                                             // 1275: }
                                             // 1275: } // switch Inst[63:56]
};
static const uint8_t DecoderTableBPFALU3264[185] = {
  OPC_SwitchField, 56, 8,                    //   0: switch Inst[63:56] {
  97, 4,                                     //   3: case 0x61: {
  OPC_Decode, 165, 3, 26,                    //   5:  decode to LDW32 using decoder 26
                                             //   5: }
  99, 4,                                     //   9: case 0x63: {
  OPC_Decode, 237, 3, 27,                    //  11:  decode to STW32 using decoder 27
                                             //  11: }
  105, 4,                                    //  15: case 0x69: {
  OPC_Decode, 161, 3, 26,                    //  17:  decode to LDH32 using decoder 26
                                             //  17: }
  107, 4,                                    //  21: case 0x6b: {
  OPC_Decode, 233, 3, 27,                    //  23:  decode to STH32 using decoder 27
                                             //  23: }
  113, 4,                                    //  27: case 0x71: {
  OPC_Decode, 155, 3, 26,                    //  29:  decode to LDB32 using decoder 26
                                             //  29: }
  115, 4,                                    //  33: case 0x73: {
  OPC_Decode, 226, 3, 27,                    //  35:  decode to STB32 using decoder 27
                                             //  35: }
  195, 1, 107,                               //  39: case 0xc3: {
  OPC_SwitchField, 4, 4,                     //  42:  switch Inst[7:4] {
  0, 24,                                     //  45:  case 0x0: {
  OPC_Scope, 8,                              //  47:   try {
  OPC_CheckField, 0, 4, 1,                   //  49:    check Inst[3:0] == 0x1
  OPC_Decode, 252, 3, 28,                    //  53:    decode to XFADDW32 using decoder 28
  OPC_Scope, 8,                              //  57:   } else try {
  OPC_CheckField, 8, 1, 1,                   //  59:    check Inst[8] == 0x1
  OPC_Decode, 166, 3, 26,                    //  63:    decode to LDWACQ32 using decoder 26
                                             //  63:   } else try {
  OPC_Decode, 246, 3, 28,                    //  67:    decode to XADDW32 using decoder 28
                                             //  67:   }
                                             //  67:  }
  1, 8,                                      //  71:  case 0x1: {
  OPC_CheckField, 8, 1, 1,                   //  73:   check Inst[8] == 0x1
  OPC_Decode, 238, 3, 27,                    //  77:   decode to STWREL32 using decoder 27
                                             //  77:  }
  4, 14,                                     //  81:  case 0x4: {
  OPC_Scope, 8,                              //  83:   try {
  OPC_CheckField, 0, 4, 1,                   //  85:    check Inst[3:0] == 0x1
  OPC_Decode, 128, 4, 28,                    //  89:    decode to XFORW32 using decoder 28
                                             //  89:   } else try {
  OPC_Decode, 132, 4, 28,                    //  93:    decode to XORW32 using decoder 28
                                             //  93:   }
                                             //  93:  }
  5, 14,                                     //  97:  case 0x5: {
  OPC_Scope, 8,                              //  99:   try {
  OPC_CheckField, 0, 4, 1,                   // 101:    check Inst[3:0] == 0x1
  OPC_Decode, 254, 3, 28,                    // 105:    decode to XFANDW32 using decoder 28
                                             // 105:   } else try {
  OPC_Decode, 248, 3, 28,                    // 109:    decode to XANDW32 using decoder 28
                                             // 109:   }
                                             // 109:  }
  10, 14,                                    // 113:  case 0xa: {
  OPC_Scope, 8,                              // 115:   try {
  OPC_CheckField, 0, 4, 1,                   // 117:    check Inst[3:0] == 0x1
  OPC_Decode, 130, 4, 28,                    // 121:    decode to XFXORW32 using decoder 28
                                             // 121:   } else try {
  OPC_Decode, 138, 4, 28,                    // 125:    decode to XXORW32 using decoder 28
                                             // 125:   }
                                             // 125:  }
  14, 8,                                     // 129:  case 0xe: {
  OPC_CheckField, 0, 4, 1,                   // 131:   check Inst[3:0] == 0x1
  OPC_Decode, 250, 3, 28,                    // 135:   decode to XCHGW32 using decoder 28
                                             // 135:  }
  15, 0,                                     // 139:  case 0xf: {
  OPC_CheckField, 0, 4, 1,                   // 141:   check Inst[3:0] == 0x1
  OPC_Decode, 223, 2, 29,                    // 145:   decode to CMPXCHGW32 using decoder 29
                                             // 145:  }
                                             // 145:  } // switch Inst[7:4]
                                             // 145: }
  203, 1, 15,                                // 149: case 0xcb: {
  OPC_SwitchField, 4, 5,                     // 152:  switch Inst[8:4] {
  16, 4,                                     // 155:  case 0x10: {
  OPC_Decode, 162, 3, 26,                    // 157:   decode to LDHACQ32 using decoder 26
                                             // 157:  }
  17, 0,                                     // 161:  case 0x11: {
  OPC_Decode, 234, 3, 27,                    // 163:   decode to STHREL32 using decoder 27
                                             // 163:  }
                                             // 163:  } // switch Inst[8:4]
                                             // 163: }
  211, 1, 0,                                 // 167: case 0xd3: {
  OPC_SwitchField, 4, 5,                     // 170:  switch Inst[8:4] {
  16, 4,                                     // 173:  case 0x10: {
  OPC_Decode, 156, 3, 26,                    // 175:   decode to LDBACQ32 using decoder 26
                                             // 175:  }
  17, 0,                                     // 179:  case 0x11: {
  OPC_Decode, 227, 3, 27,                    // 181:   decode to STBREL32 using decoder 27
                                             // 181:  }
                                             // 181:  } // switch Inst[8:4]
                                             // 181: }
                                             // 181: } // switch Inst[63:56]
};
// Handling 30 cases.
template <typename InsnType>
static DecodeStatus decodeToMCInst(unsigned Idx, DecodeStatus S, InsnType insn, MCInst &MI, uint64_t Address, const MCDisassembler *Decoder, bool &DecodeComplete) {
  DecodeComplete = true;
  using TmpType = std::conditional_t<std::is_integral<InsnType>::value, InsnType, uint64_t>;
  TmpType tmp;
  switch (Idx) {
  default: llvm_unreachable("Invalid decoder index!");
  case 0:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 1:
    tmp = fieldFromInstruction(insn, 32, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 2:
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 3:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 4:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 5:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 6:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 7:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    tmp = fieldFromInstruction(insn, 32, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 8:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    tmp = fieldFromInstruction(insn, 32, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 9:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 10:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    MI.addOperand(MCOperand::createImm(tmp));
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 11:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 12:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 13:
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 14:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = 0x0;
    tmp |= fieldFromInstruction(insn, 32, 16);
    tmp |= fieldFromInstruction(insn, 52, 4) << 16;
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 15:
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 16:
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 17:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 18:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 19:
    return S;
  case 20:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 0, 32);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 21:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 22:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 23:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 16, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    tmp = fieldFromInstruction(insn, 0, 16);
    MI.addOperand(MCOperand::createImm(tmp));
    return S;
  case 24:
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 25:
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 26:
    tmp = fieldFromInstruction(insn, 48, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = 0x0;
    tmp |= fieldFromInstruction(insn, 32, 16);
    tmp |= fieldFromInstruction(insn, 52, 4) << 16;
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 27:
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 28:
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  case 29:
    tmp = fieldFromInstruction(insn, 32, 20);
    if (!Check(S, decodeMemoryOpValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    tmp = fieldFromInstruction(insn, 52, 4);
    if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
    return S;
  }
}

template <typename InsnType>
static DecodeStatus decodeInstruction(const uint8_t DecodeTable[], MCInst &MI,
                                      InsnType insn, uint64_t Address,
                                      const MCDisassembler *DisAsm,
                                      const MCSubtargetInfo &STI) {
  const uint8_t *Ptr = DecodeTable;

  SmallVector<const uint8_t *, 8> ScopeStack;
  DecodeStatus S = MCDisassembler::Success;
  while (true) {
    ptrdiff_t Loc = Ptr - DecodeTable;
    const uint8_t DecoderOp = *Ptr++;
    switch (DecoderOp) {
    default:
      errs() << Loc << ": Unexpected decode table opcode: "
             << (int)DecoderOp << '\n';
      return MCDisassembler::Fail;
    case OPC_Scope: {
      unsigned NumToSkip = decodeULEB128AndIncUnsafe(Ptr);
      const uint8_t *SkipTo = Ptr + NumToSkip;
      ScopeStack.push_back(SkipTo);
      LLVM_DEBUG(dbgs() << Loc << ": OPC_Scope(" << SkipTo - DecodeTable
                        << ")\n");
      continue;
    }
    case OPC_SwitchField: {
      // Decode the start value.
      unsigned Start = decodeULEB128AndIncUnsafe(Ptr);
      unsigned Len = *Ptr++;
      uint64_t FieldValue = fieldFromInstruction(insn, Start, Len);
      uint64_t CaseValue;
      unsigned CaseSize;
      while (true) {
        CaseValue = decodeULEB128AndIncUnsafe(Ptr);
        CaseSize = decodeULEB128AndIncUnsafe(Ptr);
        if (FieldValue == CaseValue || !CaseSize)
          break;
        Ptr += CaseSize;
      }
      if (FieldValue == CaseValue) {
        LLVM_DEBUG(dbgs() << Loc << ": OPC_SwitchField(" << Start << ", " << Len
                          << "): " << FieldValue << '\n');
        continue;
      }
      break;
    }
    case OPC_CheckField: {
      // Decode the start value.
      unsigned Start = decodeULEB128AndIncUnsafe(Ptr);
      unsigned Len = *Ptr;
      uint64_t FieldValue = fieldFromInstruction(insn, Start, Len);
      // Decode the field value.
      unsigned PtrLen = 0;
      uint64_t ExpectedValue = decodeULEB128(++Ptr, &PtrLen);
      Ptr += PtrLen;
      bool Failed = ExpectedValue != FieldValue;

      LLVM_DEBUG(dbgs() << Loc << ": OPC_CheckField(" << Start << ", " << Len
                        << ", " << ExpectedValue << "): FieldValue = "
                        << FieldValue << ", ExpectedValue = " << ExpectedValue
                        << ": " << (Failed ? "FAIL, " : "PASS\n"););
      if (!Failed)
        continue;
      break;
    }
    case OPC_Decode: {
      // Decode the Opcode value.
      unsigned Opc = decodeULEB128AndIncUnsafe(Ptr);
      unsigned DecodeIdx = decodeULEB128AndIncUnsafe(Ptr);

      MI.clear();
      MI.setOpcode(Opc);
      bool DecodeComplete;
      S = decodeToMCInst(DecodeIdx, S, insn, MI, Address, DisAsm,
                         DecodeComplete);
      LLVM_DEBUG(dbgs() << Loc << ": OPC_Decode: opcode " << Opc
                        << ", using decoder " << DecodeIdx << ": "
                        << (S ? "PASS, " : "FAIL, "));

      if (DecodeComplete) {
        LLVM_DEBUG(dbgs() << "decoding complete\n");
        return S;
      }
      assert(S == MCDisassembler::Fail);
      // Reset decode status. This also drops a SoftFail status that could be
      // set before the decode attempt.
      S = MCDisassembler::Success;
      break;
    }
    }
    if (ScopeStack.empty()) {
      LLVM_DEBUG(dbgs() << "returning Fail\n");
      return MCDisassembler::Fail;
    }
    Ptr = ScopeStack.pop_back_val();
    LLVM_DEBUG(dbgs() << "continuing at " << Ptr - DecodeTable << '\n');
  }
  llvm_unreachable("bogosity detected in disassembler state machine!");
}


} // namespace
